There are a wide variety of packaging technologies that have been used for semiconductor devices. One of the widely used packaging technologies is termed Lead On Chip (LOC).
In LOC packaging a lead frame is positioned near the semiconductor device and wires are then bonded to pads on the chip and to the lead frame. Generally the wires are bonded to pads on the chip and to the lead frame using ultrasonic wire bonding technology. After the lead frame is connected to the semiconductor device the entire assembly is encapsulated.
In many LOC packages, the lead frame is connected to the chip with a layer of adhesive material. For example, see U.S. Patent Publication No. 2001/0016371. The layer of adhesive material between the lead frame and the chip creates various problems. For example, if pressure is applied to secure the adhesive material to the chip and to the frame, this can damage the semiconductor chip. Another potential problem is created by the fact that the layer of adhesive material separates the lead frame from the semiconductor chip. This separation can create a space into which packaging material can flow, causing potential failure sites.